GE IS220PDIOH1A MARK VIe Discrete Input Output

The GE IS220PDIOH1A is a Discrete Input/Output Module that contains two Ethernet ports, a local processor Manufactured and Designed by General Electric as Part of the Mark VIe Series used in Distributed Control Systems. The Discrete Input/Output (PDIO) pack provides the electrical interface between one or two I/O Ethernet networks and a discrete input/output terminal board. The pack contains a processor board common to all Mark VIe distributed I/O packs and an acquisition board specific to the discrete input/output function. The pack accepts up to 24 contact inputs, controls up to 12 relay outputs, and receives terminal board-specific feedback signals. The associated terminal board determines the voltage capability of PDIO. System input to the pack is through dual RJ45 Ethernet connectors and a three-pin power input. Discrete signal input/output is through a DC-62 connector that connects directly with the associated terminal board connector. Visual diagnostics are provided through indicator LEDs, and local diagnostic serial communications are possible through an infrared port.

PDIO is the functional equivalent of a PDIA and PDOA I/O pack combined into a single assembly. For simplex applications, it goes on a TDBS terminal board that is the equivalent of an SRLY relay terminal board combined with an STCI contact input terminal board. For TMR applications, it goes on a TDBT terminal board that, with the WROB option, provides the equivalent of a TRLYH1B relay terminal board combined with a TBCI contact input terminal board.

The processor board connects to an acquisition board specific to the I/O pack function. Upon application of input power, the soft-start circuit ramps up the voltage available on the processor board. The local power supplies are sequenced, and the processor reset is removed. The processor completes self-test routines and then loads application code specific to the I/O pack type from flash memory. The application code reads board ID information to ensure the correct matching of the application code, acquisition board, and terminal board. With a good match, the processor attempts to establish Ethernet communications, starting with the request of a network address. The address request uses the industry standard dynamic host configuration protocol (DHCP) and the unique identification read from the terminal board. After Ethernet initialization, the processor programs the onboard logic, run the application, and enables the acquisition board to begin operation.

The processor application code contains all the logic necessary to allow the pack to operate from one or two Ethernet inputs. When operated from two Ethernet inputs, both network paths are active all the time. A failure of either network will not result in any disturbance to the I/O pack operation, and the failure will be indicated through the working network connection. This arrangement is more tolerant of faults than a classic hot-backup system where the second port is only used after a primary port failure is detected. The Ethernet ports on the processor auto-negotiate between 10 MB/s and 100 MB/s speed, and between half-duplex and full-duplex operation. The processor board in the pack is common to all Mark VIe Ethernet I/O packs. It contains the following:

Specifications